In the case of semiconductor components, particularly in the case of memory components, it is desirable for the circuit components to have as high an integration density as possible. An extremely miniaturized chip can be used in many products and, on the other hand, the costs involved in production are reduced when as large a number of semiconductor chips as possible can be produced from one semiconductor wafer. The yield of semiconductor chips per wafer is an important component in the financial viability of production. The electronic circuits on the chips are thus not only becoming evermore extensive and complicated, but efforts are also being made to produce fundamentally equivalent circuits in ever smaller structures and thus on ever smaller semiconductor chips. The capability to reduce the size of semiconductor structures ever further, which is referred to by the expression “shrinkability” is, however, restricted by the technical limits of the production process.
One particular problem in this case is represented by the well contacts to which the implantation areas formed in the substrate are electrically connected. The wells are required in particular for the production of mutually complementary MOS transistors. During the implantation, dopants are introduced by means of which the semiconductor material is doped to be n-conductive or p-conductive. The conductive areas are intended, inter alia, as the source and drain of the field-effect transistors. During the implantation of the dopants, however, undesirable scatters occur, and subsequent diffusion out of the implantation area into the surrounding semiconductor material occurs when the dopant is activated and healed, so that the dimensions of the wells and of the component structures formed therein cannot be indefinitely reduced in size.
Attempts have already been made to minimize the respectively required chip area by the arrangement of the components on the chip and, in particular, skillful arrangement of the well contacts and substrate contacts. However, in this case, it is necessary to arrange the well contacts sufficiently far away from the source and drain contacts. If the contacts are too close to one another, scattering effects and diffusion effects occur during the implantation of the dopants that are introduced for the two different conductance types, and these adversely affect the quality of the connecting contacts. When isolation trenches, in particular so-called STI trenches (shallow trench isolation) are provided in order to limit the implantation regions and in order to prevent diffusion of the dopants into adjacent semiconductor material, this considerably increases the area consumed on the wafer.